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www.irf.com 1 06/30/05 IRF7832Zpbf hexfet power mosfet notes through are on page 10 benefits very low r ds(on) at 4.5v v gs ultra-low gate impedance fully characterized avalanche voltage and current 20v v gs max. gate rating lead-free 100% tested for rg applications synchronous mosfet for notebookprocessor power synchronous rectifier mosfet forisolated dc-dc converters top view 8 12 3 4 5 6 7 d d d d g s a s s a so-8 v dss r ds(on) max qg 30v 3.8m @v gs = 10v 30nc absolute maximum ratin g s parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t a = 25c continuous drain current, v gs @ 10v i d @ t a = 70c continuous drain current, v gs @ 10v a i dm pulsed drain current p d @t a = 25c power dissipation w p d @t a = 70c power dissipation linear derating factor w/c t j operating junction and c t stg storage temperature range thermal resistance parameter typ. max. units r jl junction-to-drain lead CCC 20 c/w r ja junction-to-ambient CCC 50 -55 to + 150 2.5 0.02 1.6 max. 2117 160 20 30
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2 www.irf.com s d g static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 30 CCC CCC v ? v dss / ? t j breakdown voltage temp. coefficient CCC 0.023 CCC v/c r ds(on) static drain-to-source on-resistance CCC 3.1 3.8 m ? CCC 3.7 4.5 v gs(th) gate threshold voltage 1.35 CCC 2.35 v ? v gs(th) gate threshold voltage coefficient CCC -5.5 CCC mv/c i dss drain-to-source leakage current CCC CCC 1.0 a CCC CCC 150 i gss gate-to-source forward leakage CCC CCC 100 na gate-to-source reverse leakage CCC CCC -100 gfs forward transconductance 80 CCC CCC s q g total gate charge CCC 30 45 q gs1 pre-vth gate-to-source charge CCC 7.9 CCC q gs2 post-vth gate-to-source charge CCC 2.6 CCC nc q gd gate-to-drain charge CCC 11 CCC q godr gate charge overdrive CCC 8.5 CCC see fig. 16 q sw switch charge (q gs2 + q gd ) CCC 13.6 CCC q oss output charge CCC 19 CCC nc r g gate resistance CCC 1.2 1.9 ? t d(on) turn-on delay time CCC 14 CCC t r rise time CCC 15 CCC t d(off) turn-off delay time CCC 18 CCC ns t f fall time CCC 5.6 CCC c iss input capacitance CCC 3860 CCC c oss output capacitance CCC 840 CCC pf c rss reverse transfer capacitance CCC 370 CCC avalanche characteristics parameter units e as single pulse avalanche energy mj i ar avalanche current a diode characteristics parameter min. typ. max. units i s continuous source current CCC CCC 3.1 (body diode) a i sm pulsed source current CCC CCC 160 (body diode) v sd diode forward voltage CCC CCC 1.0 v t rr reverse recovery time CCC 16 24 ns q rr reverse recovery charge CCC 29 44 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) conditions max. 350 16 ? = 1.0mhz conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 20a mosfet symbol v ds = 16v, v gs = 0v v dd = 15v, v gs = 4.5v i d = 16a v ds = 15v v gs = 20v v gs = -20v v ds = 24v, v gs = 0v t j = 25c, i f = 16a, v dd = 15v di/dt = 500a/s t j = 25c, i s = 16a, v gs = 0v showing the integral reverse p-n junction diode. v gs = 4.5v, i d = 16a v gs = 4.5v typ. CCC v ds = v gs , i d = 250a clamped inductive load v ds = 15v, i d = 16a v ds = 24v, v gs = 0v, t j = 125c CCC i d = 16a v gs = 0v v ds = 15v downloaded from: http:///

www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 5.0v 4.5v 3.5v 3.0v 2.7v 2.5v bottom 2.3v 60s pulse width tj = 25c 2.3v -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.5 1.0 1.5 2.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 21a v gs = 10v 1 2 3 4 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) v ds = 15v 60s pulse width t j = 25c t j = 150c 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.3v 60s pulse width tj = 150c vgs top 10v 5.0v 4.5v 3.5v 3.0v 2.7v 2.5v bottom 2.3v downloaded from: http:///

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 1 02 03 04 0 q g total gate charge (nc) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 24v v ds = 15v i d = 16a 0.2 0.4 0.6 0.8 1.0 1.2 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v 0 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) t a = 25c tj = 150c single pulse 100sec 1msec 10msec downloaded from: http:///

www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-ambient fig 9. maximum drain current vs. case temperature fig 10. threshold voltage vs. temperature 25 50 75 100 125 150 t a , ambient temperature (c) 0 5 10 15 20 25 i d , d r a i n c u r r e n t ( a ) -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 0.5 1.0 1.5 2.0 2.5 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 100 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 10 100 t h e r m a l r e s p o n s e ( z t h j a ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thja a p t t dm 1 2 ri (c/w) i (sec) 5.6971 0.01529628.314 1.214900 16 40.40000 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci= i / ri ci= i / ri a a downloaded from: http:///

6 www.irf.com fig 13. maximum avalanche energy vs. drain current fig 16. switching time test circuit fig 17. switching time waveforms fig 12. on-resistance vs. gate voltage d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 15. gate charge test circuit fig 14. unclamped inductive test circuit and waveform t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v vgs v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t + - v gs v ds 90% 10% t d(on) t d(off) t r t f 25 50 75 100 125 150 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 1400 1600 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 1.0a 1.4a bottom 16a 2 4 6 8 10 v gs, gate -to -source voltage (v) 2 4 6 8 10 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ? ) i d = 21a t j = 25c t j = 125c downloaded from: http:///

www.irf.com 7 fig 18. for n-channel hexfet power mosfets
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? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period

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8 www.irf.com control fet

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#' p loss = p conduction + p switching + p drive + p output this can be expanded and approximated by; p loss = i rms 2 r ds(on ) () + i q gd i g v in f ? ? ? ? ? ? + i q gs 2 i g v in f ? ? ? ? ? ? + q g v g f () + q oss 2 v in f ? ? ? ? " (

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synchronous fet the power loss equation for q2 is approximated by; p loss = p conduction + p drive + p output * p loss = i rms 2 r ds(on) () + q g v g f () + q oss 2 v in f ? ? ? ? ? + q rr v in f ( ) *dissipated primarily in q1. for the synchronous mosfet q2, r ds(on) is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. under light load the mosfet must still be turned on and off by the con- trol ic so the gate drive losses become much more significant. secondly, the output charge q oss and re- verse recovery charge q rr both generate losses that are transfered to q1 and increase the dissipation in that device. thirdly, gate charge will impact the mosfets susceptibility to cdv/dt turn on. the drain of q2 is connected to the switching node of the converter and therefore sees transitions be-tween ground and v in . as q1 turns on and off there is a rate of change of drain voltage dv/dt which is ca-pacitively coupled to the gate of q2 and can induce a voltage spike on the gate that is sufficient to turn the mosfet on, resulting in shoot-through current . the ratio of q gd /q gs1 must be minimized to reduce the potential for cdv/dt turn on. power mosfet selection for non-isolated dc/dc converters figure a: q oss characteristic downloaded from: http:///

www.irf.com 9 so-8 package outline (dimensions are shown in millimeters (inches) so-8 part marking

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repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 2.7mh, r g = 25 ? , i as = 16a. pulse width 400s; duty cycle 2%. when mounted on 1 inch square copper board. r is measured at
330.00 (12.992) max. 14.40 ( .566 ) 12.40 ( .488 ) notes : 1. controlling dimension : millimeter. 2. outline conforms to eia-481 & eia-541. feed direction terminal number 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) notes: 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters(inches). 3. outline conforms to eia-481 & eia-541. so-8 tape and reeldimensions are shown in millimeters (inches) data and specifications subject to change without notice. this product has been designed and qualified for the consumer market. qualifications standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 06/05 downloaded from: http:///

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